In the field of electronic systems there is an incessant competitive pressure among manufacturers to drive the performance of their equipment up while driving down production costs. This is particularly true regarding the testing of integrated circuits (hereinafter “ICs”). ICs must generally be tested before they are incorporated into an electronic assembly in order to verify that each element on the IC functions properly.
It is well known to perform accelerated life testing on ICs to ensure that the ICs do not prematurely fail when they have been incorporated into higher levels of electronic packaging, such as computer systems, (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, MP3 (Motion Picture Experts Group, Audio Layer 3) players, etc.), and the like.
A goal of burn-in is to provide infant-mortality screening of ICs for reliability defects. By operating the ICs at increased voltage and/or temperature levels, while stimulating as many transistors on the ICs as possible, ICs that might fail prematurely are identified early and pulled out prior to shipment to customers. It is desirable to keep burn-in time (BITM) to a minimum to reduce production costs.
As high performance ICs are packed with increasing numbers of transistors numbering in the millions, the transistor channel length Le has been made increasingly shorter to improve performance. Generally, the shorter the channel length Le the higher the leakage current ISB. As the leakage current ISB increases, so does the corresponding power requirement, and the attendant heat dissipation. Thus, testing large quantities of ICs can require substantial consumption of electrical power resources, even as such resources become increasingly scarce and costly.
It is desirable to thoroughly test ICs undergoing burn-in testing while at the same time minimizing the cost, time, and complexity of such testing.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a significant need in the art for improved IC burn-in methods and apparatus.